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    Inside IBM's graphene IC

    IBM has revealed details of its experimental graphene IC which operates at up to 10GHz, and has been made with materials that could be used across a whole wafer.

    Synthesising defect-free graphene has proved difficult, causing many researchers to make devices on high-quality graphene flaked by hand from natural graphite.

    IBM first step towards planar process-compatible graphene circuits has been to grow raw material of sufficient quality - in this case on the silicon face of a silicon carbide wafer at its TJ Watson lab.

    Graphene's crystal structure is much like stacked layers of chicken wire, and it rapidly looses its remarkable high-speed properties if it gets more than a few layers thick.

    IBM has chosen to work with two or three layers.

    The proof-of-concept circuit is a simple mixer with one graphene fet, plus two inductors built from metal layers (see diagram).

    Materials and processes were selected to work with graphene whose mechanical and electronic properties are not the same as silicon.

    For example, because thick metal does not stick well to graphene, underlying silicon carbide had to be re-exposed around the device site (see photo below).

    In this case, the channel area was protected by an electron beam-defined polymer mask - later dissolved away with acetone - and oxygen plasma used for the etch.

    On the graphene, thin palladium topped with gold (60nm in total) was selected to form ohmic source and drain contacts as well as the gate conductor.

    Inside IBM20nm of aluminium oxide was used as a gate insulator, built-up by atomic layer deposition over a seed layer of oxidised aluminium on the graphene surface.

    Inductors were also defined by electron beam lithography, and made from aluminium and silicon dioxide layers.

    According to the lab, with 500nm gate length and 1.6V bias, the FET showed n-type transport.

    The common-source mixer uses channel resistance modulation, with one input signal applied directly to the gate and the other directly to the drain.

    DC gate bias is applied through one of the inductors, and the mixer's difference signal is extracted from the drain through the filtering action of the second inductor.

    The mixer is reported to have a 27dB conversion loss at 4GHz, which could be improved by 20dB by using a using hi-k dielectrics - 2nm of HfO2 - said IBM, or reducing the gate length to 40nm.

    Conversion loss was flat to 1dB from 25 to 125°C.

    Full details of the device have been published in Science.

    Inside IBMThe gate contact is on the top left of the detail with its two fingers running diagonally down, the drain contact is down on the bottom right, and two large triangular source contacts can be seen. The broad translucent diagonal stripe is gate insulator.